Some Notes from Books and Magazines



TITLE :BIOS- SOME IMPORTANT ADDRESSES 
SOURCE : 
AUTHOR : 
DATE : . . 
ISSUE: 
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A serial number for your computer is embedded in ROM at location 
hex FE000. To see it type D FE00:0. A 7-digit number followed by a
copyright date should display on the screen. 
The date of your ROM BIOS begins at hex location FFFF5, recorded 
as mm/dd/yy. Type D FFFF:05 
20 MB hd formatting on XTs:g=c800:5 
To check for the monitor type (color or not): 
0000:0463h 
A value of 0B4h at this location indicates that monitor is 
monochrome.0D4:color display. The MODE.COM will change the value 
stored there. 





TITLE :FIX DEFECTIVE DISKETTE CHANGE LINES 
SOURCE :PC COMPUTING 
AUTHOR : 
DATE :01.02.94
ISSUE : 
PAGE :222 
SUBJECT: 

You know that the drive's change line has gone bad if you type DIR
to display a disk directory and see the same directory listing 
after you remove the disk, insert another, and type DIR again. 
Add the following line to the config.sys: 
DRIVPARM=/D:drive /H:2 /S:sectors /T:80 
Substitute a number identifying the drive for drive (0=A, 1=B, and
so on). For a 720K drive, substitute 9 for sectors; for a 1.44 MB 
drive, substitute 18. 
This command alters the parameter table set up for the drive and 
fools DOS into believing that the change line is no longer there. 
DOS will ignore the change line and the drive will work properly 
again. 




TITLE :IDE AND SCSI AT THE SAME TIME? 
SOURCE :1001 KOMPUTER ANSWERS 
AUTHOR :KIM KOMANDO 
DATE : . . 
ISSUE : 
PAGE :438 
SUBJECT:HD 

IDE DRIVE MUST BE PRIMARY OR THE BOOT DRIVE FOR BOTH DRIVES TO BE 
ACCESSIBLE AT THE SAME TIME. 




TITLE :INTERRUPT LIST 
SOURCE :1001 KOMPUTER ANSWERS 
AUTHOR :KIM KOMANDO 
DATE : . . 
ISSUE : 
PAGE :122 
SUBJECT:IRQ 

IRQ DEVICE 
0 SYSTEM TIMER 
1 KEYBOARD 
2 RESERVED FOR SYSTEM USE 
3 COM2,COM4,NETWORK ADAPTERS,CD-ROMS,SOUND BOARDS 
4 COM1,COM3 
5 LPT2 
6 FLOPPY DISK CONTROLLER 
7 LPT1 
8 REAL-TIME CLOCK 
9 RESERVED FOR SYSTEM USE 
10 AVAILABLE 
11 " 
12 " 
13 MATH COPROCESSOR 
14 HD CONTROLLER 
15 AVAILABLE 




TITLE :ISDN-2B1Q SIGNALLING 
SOURCE : 
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SUBJECT: 

The 2B1Q (two binary, one quaternery) technique means that every 
change in the digital transmission signal-four variations in 
amplitude and polarity are possible- will carry two binary bits of
information. Thus a signalling rate of 80 KHz will allow 2B1Q to 
derive the total 160 kbit/sec needed for the basic rate interface,
including the 16 kbit/s of control information. 




TITLE :MICROPROCESSORS-386SLC 
SOURCE : 
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SUBJECT: 

The 386SLC differs from standard 386SXs by including an on-board 
cache controller, an 8 K 32-bit cache, and optimised instructions 
to reduce the number of clock cycles needed for common processor 
tasks. Rated at 20 MHz, the chip performs as well as or better 
than 25 MHz 386DX processors. IBM's standard 386SX systems-the 
PS/2 56 SX and 57 SX-use Intel's 386SX CPU's, but they can be 
upgraded easily with the pin compatible 386SLC chip. 




TITLE :MICROPROCESSORS-80486 
SOURCE : 
AUTHOR : 
DATE : . . 
ISSUE : 
PAGE : 
SUBJECT: 

It is told that the members of the design team of the Intel 486 
have literally carved their individual initials into the subtrata 
of the chip itself. Designers made the initials all part of 
working circuits, so they can't be removed by some killjoy. 


 



TITLE :MODEM/ PROTOCOLS 
SOURCE : 
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SUBJECT: 

The leading modem-based error-protection scheme is the Microcom 
Networking Protocol (MNP), designed to interface with the ISO 
model for OSI. MNP frames a block of data with control 
information. During transmission, the data block varies in size 
from 1 byte to 156 bytes as line conditions change. The block of 
data is preceded by the synchronous idle (SYN) byte, which alerts 
the receiving modem to incoming data, the data link escape (DLE) 
byte, and the start of the test (STX) bytes. Two headers follow. 
The first contains sequence numbers and link information so that 
data can be reassembled. The second carries session information 
and further describes the user data. After the data block, DLE and
end of text (ETX) bytes indicate the end of the data block. The 
last two bytes are the frame check containing the cyclic 
redundancy check (CRC) blocks. If no problem, the data has been 
transferred without error, and an acknowledgement (ACK) is sent to
the sending modem. If any problem, a negative acknowledge (NAK) is sent and the block is retransmitted. 
The major rival to the MNP protocol is Link Access Procedure Modem
(LAPM), a subset of Link Access Protocol D (LAP D), a member of 
the High Level Data Link Control (HALC) protocol family. LAPD is 
the error-control protocol in CCITT recommandation X.25, and is 
designated for use in ISDN. It is independent of the modem 
modulation technique. 




TITLE :MORE FREE UPPER MEMORY 
SOURCE :PC COMPUTING 
AUTHOR : 
DATE :01.02.94
ISSUE : 
PAGE :222 
SUBJECT: 

If you use DOS 5.0 or later, you can squeeze a few more device 
drivers or TSRs into upper memory as long as your PC is outfitted 
with a color video adapter. Add an I=B000-B7FF parameter to the 
line in config.sys that loads EMM386.EXE. 
If Windows gripes about the switch, add the statement 
DEVICE=c:\DOS\MONOUMB.386 
to the [386Enh] section of SYSTEM.INI 


 



TITLE :MULTIPLE PROCESSORS 
SOURCE : 
AUTHOR : 
DATE : . . 
ISSUE : 
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SUBJECT: 

Parallel processing: Many processors working on the same problem 
at the same time. There are two major categories of parallel 
architecture. In the SIMD (single instruction and multiple data 
stream) system, the processors perform the same instruction at 
each cycle, but each operates on different data. In an MIMO 
(multiple instruction and multiple data stream) system, the 
processors can run independently. Each processor can execute 
different portions of the same program or completely different 
programs. 
An important aspect of multiple-processor architectures is how the
processors are associated with memory. In shared-memory systems, all processors access the common physical memory by direct connections, by a network of connections, or by a memory bus. Shared memory systems enable each processor to operate on data that is also accessible to other processors. Because all 
processors can modify stored data, care must be taken to avoid 
attempts by processors to gain access to data before the 
appropriate value has been stored. Examples of shared-memory 
parallel computers are Cray's Cray-2, ETA's ETA 10 and IBM's RP3. 
In contrast to the shared-memory model, there are the distributed 
-memory model or local-memory systems. This form of 
processor/memory relationship exists when some amount of memory (local memory) is attached to each processor, and connections are established among the processor-memory pairs (also designated as a node processor, or simply nodes). If a processor has to access or modify the value of a piece of data that does not exist in its local memory, message-passing via communication channels is the mechanism required to achieve the task. The communication channels are the actual physical linkages of the individual processors and can be arranged in an arbitrary topology. 



TITLE :NETWARE/MAPASSIST PROGRAM 
SOURCE : 
AUTHOR : 
DATE : . . 
ISSUE : 
PAGE : 
SUBJECT: 

IN ORDER TO USE MAP ASSIST A 6K RESIDENT MODULE MUST BE LOADED ON 
THE COMPUTERS WITH THE LOCAL DRIVE TO BE SHARED. THIS MODULE IS 
CALLED MAR.COM 
INSTALL.BAT 
MA.COM 
MAHOST.COM 
READ.ME 
MAHOST PATH,SECURITY,#(1...5) 


 



TITLE :NOTES-THE FREQUENCIES 
SOURCE :PC MAGAZINE 
AUTHOR : 
DATE :30.04.91
ISSUE : 
PAGE :413 
SUBJECT:MUSIC 

S:Note is sharp (#) 
S 0.0 C2 523.25 
CI 261.63 CS2 554.37 
CSI 277.18 D2 587.33 
DI 293.66 DS2 622.25 
DSI 311.13 E2 659.26 
EI 329.63 F2 698.46 
FI 349.23 FS2 739.99 
FSI 369.99 G2 783.99 
GI 392.0 GS2 830.61 
GSI 415.3 A2 880.0 
AI 440.0 AS2 932.33 
ASI 466.16 B2 987.77 
BI 493.88 


 



TITLE :OPTICAL DISKS 
SOURCE : 
AUTHOR : 
DATE : . . 
ISSUE : 
PAGE : 
SUBJECT: 

Typically, an optical disk head comes no closer than 1 mm from the
disk subtrate. In contrast, the high-performance head of the IBM 
3280 magnetic drive flies just 0.25 micrometer from the surface of
the disk. 


 



TITLE :POSTSCRIPT/GENERAL 
SOURCE : 
AUTHOR : 
DATE : . . 
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SUBJECT: 

POSTSCRIPT PRINTERS DON'T NORMALLY USE STORED BIT-MAPS. WHEN an 
application tells a Postscript printer to print some text in 
15-point Helvetica, the printer constructs the necessary bit map 
on its own memory. To do this, it consults a "typeface outline" 
that contains data on the shape-but not the size-of each 
character. 


 



TITLE :RS 232/9 PIN-25 CONVERSION 
SOURCE : 
AUTHOR : 
DATE : . . 
ISSUE : 
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SUBJECT: 

9 PIN SIDE 25 PIN SIDE 
2 RX 2 TX 
3 TX 3 RX 
4 DTR 4 RTS 
5 GROUND 5 CTS 
6 DSR 6 DSR 
7 RTS 7 GROUND 
8 CTS 20 DTR 




TITLE :SERIAL PORT-MAC & PC CONNECTION 
SOURCE : 
AUTHOR : 
DATE : . . 
ISSUE : 
PAGE : 
SUBJECT: 

MAC MINI DIN-8 PIN ----> RS-232 
1 OUTPUT HANDSHAKE NC 
2 20 FOR IMAGEWRITER, NC FOR PC 
3 TARNSMIT DATA (TxD-) 3 
4 GROUND 7 
5 RECEIVE DATA (RxD-) 2 
6 TRANSMIT DATA (TxD+) NC 
7 NC NC 
8 RxD+ GROUND 7 




TITLE :SIMMS- 30-PIN AND 72-PIN 
SOURCE :1001 KOMPUTER ANSWERS 
AUTHOR :KIM KOMANDO 
DATE : . . 
ISSUE : 
PAGE :453 
SUBJECT:MEMEORY 

THE 30-PIN SIMM HAS 9 BITS ON A SIMM, AND THE 72-PIN SIMM HAS 36 BITS.THE 30-PIN CHIP IS SMALLER THAN THE 72-PIN CHIP. WITH 30-PIN CHIPS, YOU NEED TO USE FOUR CHIPS TOGETHER TO FILL ONE ENTIRE BANK TO GET THE REQUIRED 36 BITS.SUCH A SYSTEM IS LESS FLEXIBLE BECAUSE YOU HAVE LESS CHOICE ABOUT HOW MUCH MEMORY YOU CAN ADD TO IT. FOR 
EXAMPLE, IF YOU HAVE FOUR 1 MB 9-BIT SIMMS FOR A TOTAL OF 4 MB IN ONE BANK, YOU CANNOT SIMPLY ADD TWO MORE MEGABYTES FOR A TOTAL OF 6 MB. INSTEAD, YOU HAVE TO BUY FOUR MORE 1 MB SIMMS TO FILL UP THE ENTIRE SECOND BANK, OR ELSE THE COMPUTER WILL NOT WORK. IN CONTRAST, IF YOU WANT ANOTHER 2 MB AND YOU HAVE 36-BIT SIMMS, YOU JUST ADD THEM AS DESIRED WITHOUT HAVING TO WORRY ABOUT FILLING UP A BANK. The 72-pin SIMMs are ideal for 386DX systems and higher because they provide all 36 bits that are needed to fill a bank on one chip. These systems are set up this way because a 386DX or higher has a 32-bit bus for communicating with the memory. The bus needs to be connected to a full 32 bits. The 72-pin SIMM provides 32 bits for data, plus 4 bits for parity checking, or 1 parity bit for every 8 data bits...You can put 72-pin chips in one at a time. Plus, you can put chips that are different speeds next to each 
other. 


 



TITLE :TOKEN-RING NETWORKS/EARLY TOK. 
SOURCE : 
AUTHOR : 
DATE : . . 
ISSUE : 
PAGE : 
SUBJECT: 

Early token release: A workstation on the ring can transmit a 
token immediately after sending a frame of data, rather than 
waiting for its frame to return. 


 



TITLE :UMB SEGMENTS 
SOURCE :PC COMPUTING
AUTHOR : 
DATE :01.08.93
ISSUE : 
PAGE :183 
SUBJECT: 

UMB SEGMENT ADDRESS 
INTERRUPT VECTOR TABLE AND DOS BIOS LOW MEMORY TABLES 0000-0FFF 
640 KB CONVENTIONAL RAM 1000-9000 
DISK CONTROLLER COMMAND.COM,VIDEO RAM A000 
VIDEO RAM B000 
EGA AND VGA ROM BIOS C000-C7FF 
HARD DISK ROM BIOS C800-CFFF 
SCSI ADAPTERS,NETWORK ADAPTERS D000-DFFF 
EXPANDED MEMORY PAGE FRAME, ROM BIOS ON PS/2S E000-EFFF 
SYSTEM ROM BIOS F000-F3FF 
BASIC,OLDER SYSTEMS ROM BIOS F400-FFFF 


 



TITLE :CHARACTER TABLE ADDRESS 
SOURCE :BYTE 
AUTHOR : 
DATE :01.09.94
ISSUE : 
PAGE :131 
SUBJECT: 

The IBM PC display screen is memory-mapped at addres B000:0000 for
monochrome displays (segment B000, offset 0), and at B800:0000 for
color displays. Writing data into memory at the address of the 
screen will show data on the display...Each screen character is 
represented as a 2-byte entity. 


 



TITLE :VIDEO-XGA ADAPTER 
SOURCE :PC WORLD 
AUTHOR : 
DATE :01.12.90
ISSUE : 
PAGE :15 
SUBJECT: 

XGA: Extended Graphics Array will work with noninterlaced 
monitors. XGA runs VGA software faster and supports 256 colors at 
640 by 480 VGA resolution and 16 colors at 1024 by 768 ( or 256 
colors with added memory). A special 16-bit color mode allows 
65,536 colors on screen. 


 



TITLE :VIDEO/8514 ADAPTER 
SOURCE : 
AUTHOR : 
DATE : . . 
ISSUE : 
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SUBJECT: 

This separate board plugs into a special auxiliary video connector
slot in the PS/2 models with the MCA bus (models 60,70, and 80). 
It substitutes its own signals for those coming from the main 
board's VGA circuitry and can produce 1024-by-768-pixel resolution
on an 8514-A capable monitor. With enough memory, an 8514/A board 
can also generate 256 colors from a palette of 256,000. At its 
640-by-480-pixel resolution, the 8514A can automate a few graphics
tasks, such as programmable fonts and filling areas. 




TITLE :CMOS 
SOURCE : 
AUTHOR : 
DATE : . . 
ISSUE : 
PAGE : 
SUBJECT: 

On a standard AT compatible, the CMOS storage is accessed by a 
pair of I/O ports at 70 and 71 hexadecimal. 


 



TITLE :DIGITAL PULSE 
SOURCE : 
AUTHOR : 
DATE : . . 
ISSUE : 
PAGE : 
SUBJECT: 

A digital pulse with an original 2.5 V amplitude loses about 40 dB
after moving over a 6-km transmission line to deliver just 25 mV 
at its destination. 


 



TITLE :DMA CHANNELS 
SOURCE :PC COMPUTING
AUTHOR : 
DATE :01.08.93
ISSUE : 
PAGE :183 
SUBJECT: 

DMA CHNL BUS TYPE DEFAULT USE 
0 8-BIT AVAILABLE 
1 8-BIT AVALIABLE 
2 8-BIT FDD CONTROLLER 
3 8-BIT AVAILABLE 
4 16-BIT DMA CONTROLLER LINK 
5 16-BIT HD CONTROLLER 
6 16-BIT AVALIABLE 
7 16-BIT AVALIABLE 


 



TITLE :EMM386.EXE-REBOOT PROBLEMS 
SOURCE :PC COMPUTING 
AUTHOR : 
DATE :01.01.94
ISSUE : 
PAGE :272 
SUBJECT: 

EMM386.EXE handles reboots differently in DOS 6.0. Add this line 
DEVICE=EMM386.EXE NORAM ALTBOOT 



 



TITLE :ERROR CODES-PARITY ERRORS 
SOURCE : 
AUTHOR : 
DATE : . . 
ISSUE : 
PAGE : 
SUBJECT: 

Parity check 1 refers to a problem with motherboard memory; parity check 2 refers to memory on a card in a slot. 


 



TITLE :FILE SYSTEM-SUBDIRECTORIES 
SOURCE : 
AUTHOR : 
DATE : . . 
ISSUE : 
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SUBJECT: 

Subdirectories are clusters on-disk that begin with a period 
follewed by ten spaces and, at offset 32 have two periods followed
by nine spaces.